From b59ebc7afcff28a7bb8df0b54b7df98b4173459c Mon Sep 17 00:00:00 2001 From: Jet Hughes Date: Tue, 19 Jul 2022 21:31:14 +1200 Subject: [PATCH] vault backup: 2022-07-19 21:31:14 --- content/notes/03-sequential-logic-circuits.md | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/content/notes/03-sequential-logic-circuits.md b/content/notes/03-sequential-logic-circuits.md index eba5c77e0..5033507b8 100644 --- a/content/notes/03-sequential-logic-circuits.md +++ b/content/notes/03-sequential-logic-circuits.md @@ -12,4 +12,19 @@ Sequential logic circuit output depends not only on the inputs but also past his ![combinatorial vs sequential](https://i.imgur.com/GbfAZ4c.png) +Two types: +- synchronous + - changes of state happen in time with a clock cycle + - input changes occur between clock pulses + - state changes occur at the clock pulses +- asynchronous + - We will not be studying these + - State changes occur as changes in inputs occur + - Event driven + +# Memory circuits +- Set-reset latch +- D-type flip-flop +- T-type flip-flop +- JK-type flip-flop \ No newline at end of file