vault backup: 2022-07-26 12:28:12

content/notes/03-sequential-logic-circuits.md

@@ -31,7 +31,7 @@ Two types:
 - Set-reset latch ![sr latch](https://i.imgur.com/mhXd77i.png)
 - D-type flip-flop ![delay flip flop](https://i.imgur.com/IpQfNRm.png)
 - T-type flip-flop ![t flip flop](https://i.imgur.com/SZn2J94.png)
-- JK-type flip-flop ![jk flip flop](https://i.imgur.com/OgfTehO.png), [jk flip flop 2](https://i.imgur.com/8zJvDuw.png) [simulation](https://tinyurl.com/2bewwd7h)
+- JK-type flip-flop ![jk flip flop](https://i.imgur.com/OgfTehO.png), ![jk flip flop 2](https://i.imgur.com/8zJvDuw.png) [simulation](https://tinyurl.com/2bewwd7h)
 - synchronous counter ![simulation](https://tinyurl.com/25olydjb), ![slide](https://i.imgur.com/81LS7HL.png)
 
 # State transition

content/notes/cosc-204.md

@@ -22,6 +22,7 @@ tags:
 - [logic-gates](notes/logic-gates.md)
 - [transistors](notes/transistors.md)
 - [demultiplexor](notes/demultiplexor.md)
+- [sequential-circuits](notes/sequential-circuits.md)
 
 - Hardware
 - Assembly

content/notes/sequential-circuits.md

@@ -49,12 +49,25 @@ The T flip flop swtiches between the two outputs Q and Q̄ when
 
 ## JK Flip Flop
 
-![JK flip flop diagram](https://i.imgur.com/dFZGyMh.png)
+![JK flip flop diagram|200](https://i.imgur.com/dFZGyMh.png)
 
 The JK flip flop is a combination of the d flip flop and the t flip flop. 
 
+| J | K | Result    |
+|:--|:--|:----------|
+| 0 | 0 | No Change |
+| 0 | 1 | Set       |
+| 1 | 0 | Reset     |
+| 1 | 1 | Toggle    |
 
+It can be used as a toggle *and* as a d flip flop.
 
+![jk flip flop simulation](https://tinyurl.com/22pvm3sf)
+
+## Synchronous Counter
+
+ ![simulation](https://tinyurl.com/25olydjb)
+ ![slide|300](https://i.imgur.com/81LS7HL.png)
 
 
 ## Video demonstration of some sequential circuits