vault backup: 2022-07-27 18:34:35

content/notes/04-computer-architecture.md

@@ -4,11 +4,27 @@ aliases:
 tags: 
 - cosc204
 - lecture
-sr-due: 2022-07-26
+sr-due: 2022-08-04
-sr-interval: 3
+sr-interval: 8
 sr-ease: 250
 ---
 
+- [memory](notes/memory.md)
+- [control-unit](notes/control-unit.md)
+- [bus](notes/bus.md)
+- [CPU](notes/CPU.md)
+- [ALU](notes/ALU.md)
+- [computer-architecture](notes/computer-architecture.md)
+
+
+
+
+
+
+
+
+
+
 
 - tristate buffer [slide](https://i.imgur.com/2Kb419g.png)
 - ![memory write](https://i.imgur.com/PExnbFm.png) [circuit simulator](https://tinyurl.com/2bmqovqz)

content/notes/ALU.md

@@ -0,0 +1,22 @@
+---
+title: "ALU"
+aliases: 
+tags: 
+- cosc204
+---
+
+part of the [CPU](notes/CPU.md)
+
+![](https://i.imgur.com/wLJhTSG.png)
+
+- performs arithmetic
+	- add, subtract, etc.
+- logical operations
+	- and, or, shift, etc
+- subunits
+	- lofical operations
+	- addition
+	- multiplication and dividion
+	- shifting
+	- comparison
+	- logical tests (if, >0, <0, =0, <=0, etc)

content/notes/CPU.md

@@ -0,0 +1,23 @@
+---
+title: "CPU"
+aliases: 
+tags: 
+- cosc204
+---
+
+![](https://i.imgur.com/NxDLkuN.png)
+
+The CPU controls the computer. It is the main component.
+
+A CPU is made of many components including
+- [Registers](notes/memory.md#Registers)
+- [control-unit](notes/control-unit.md)
+- [ALU](notes/ALU.md)
+
+data is transeferred betwen these components and memory through [data buses](notes/bus.md)
+
+
+
+examlple of an old CPU
+
+![diagram for 6809](https://i.imgur.com/41F0tnH.png)

content/notes/bus.md

@@ -0,0 +1,22 @@
+---
+title: "bus"
+aliases: 
+tags: 
+- cosc204
+---
+
+
+- data bus
+- address bus
+- control bus
+
+- conmmunicate between parts of the computer
+- only one transmitter at a time
+- only addressed device can respond
+- 2 levels
+	- internal
+	- external
+
+- memory size is dependent on bus size
+	- 2n bytes for n-lines on the address bus
+		- 2^8=256B, 2^16=64KB, 2^32=4GB, 2^64=16EB

content/notes/computer-architecture.md

@@ -0,0 +1,26 @@
+---
+title: "computer-architecture"
+aliases: 
+tags: 
+- cosc204
+---
+
+# Stored program computer
+![](https://i.imgur.com/wxSfxiO.png)
+
+made up of:
+- [CPU](notes/CPU.md)
+- [memory](notes/memory.md)
+- etc
+
+# Von Neumann Architecture
+- three key concepts
+	- data and instructions are stored in a single read-write memory
+	- contents of memory are addressable by location, without regard to the type of data contained
+	- execution occurs in a sequential fashion, unless explicitly altered, from one instuction to the next
+- programs and data are the same thing
+	- and so its possible to write soure code (data) and comile them into executables (programs) that can be loaded as data and then executed as programs
+
+# Early computers
+![motorola MC6809 CPU](https://i.imgur.com/yq74Ops.png)
+![circuit diagram for 6809](https://i.imgur.com/41F0tnH.png)

content/notes/control-unit.md

@@ -0,0 +1,17 @@
+---
+title: "control-unit"
+aliases: 
+tags: 
+- cosc204
+---
+
+# Control unit
+![](https://i.imgur.com/bQ4eA94.png)
+
+- coordinates the operation of the computer
+- generates control signals
+	- connect registers to the bus
+	- control the function of the ALU
+	- provides timing signals to the system
+
+allso associated with the decoding and executuion of instructions in a pipelined system

content/notes/cosc-204.md

@@ -23,7 +23,11 @@ tags:
 - [transistors](notes/transistors.md)
 - [demultiplexor](notes/demultiplexor.md)
 - [sequential-circuits](notes/sequential-circuits.md)
-- 
+- [bus](notes/bus.md)
+- [control-unit](notes/control-unit.md)
+- [CPU](notes/CPU.md)
+- [ALU](notes/ALU.md)
+- [computer-architecture](notes/computer-architecture.md)
 
 - Hardware
 - Assembly

content/notes/memory.md

@@ -32,4 +32,14 @@ This is often called ROM (read only memory)
 - Registers are memory cells with names within the CPU. 
 - They hold data instructions or CPU status.
 
-
+## Special purpose registers
+- program counter
+	- stores address of current instruction
+- accumulator
+	- source of one of the operands
+	- destination of the result
+- status flags
+	- individaul bits store information about results of operations
+		- result of last instruction was negative, zero, or postive
+		- carry from most recent arithmetic operation
+		- overflow occurred during the last instruction