From 09ea94f8960e57feaa0ac77ac14a20348050a2f1 Mon Sep 17 00:00:00 2001 From: Jet Hughes Date: Sat, 23 Jul 2022 23:24:14 +1200 Subject: [PATCH] vault backup: 2022-07-23 23:24:14 --- content/notes/04-computer-architecture.md | 55 +++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/content/notes/04-computer-architecture.md b/content/notes/04-computer-architecture.md index 61f34741a..09dc197ad 100644 --- a/content/notes/04-computer-architecture.md +++ b/content/notes/04-computer-architecture.md @@ -69,4 +69,59 @@ tags: - shifting - comparison - logical tests (if, >0, <0, =0, <=0, etc) + +# Control unit +![](https://i.imgur.com/bQ4eA94.png) + +- coordinates the operation of the computer +- generates control signals + - connect registers to the bus + - control the function of the ALU + - provides timing signals to the system + +allso associated with the decoding and executuion of instructions in a pipelined system + +# Registers +![](https://i.imgur.com/32rVBFW.png) + +- memory cells with names +- hold data, instructions, or CPU status +- various sizes, (8, 16, 32, or 64, or larger (512)) +- hold data typically the same width as memory words +- registers for accessing memory typically the same with as the address bus + +Special purpose registers +- program counter + - stores address of current instruction +- accumulator + - source of one of the operands + - destination of the result +- status flags + - individaul bits store information about results of operations + - result of last instruction was negative, zero, or postive + - carry from most recent arithmetic operation + - overflow occurred during the last instruction + +# CPU +![](https://i.imgur.com/NxDLkuN.png) + +# Computer +![](https://i.imgur.com/DSa47Jy.png) + +# Instructions +- bit patterns +- can be split into a number of fields + - operation to be executed + - the address in memory + - which registers (or memory cells) to use as operands + - where to place the result (registers or memory) + +# Stored program computer +![](https://i.imgur.com/wxSfxiO.png) + +# Von Neumann Architecture +- three key concepts + - data and instructions are stored in a single read-write memory + - contents of memory are addressable by location, without regard to the type of data contained + - execution occurs in a sequential fashion, unless explicitly altered, from one instuction to the next - \ No newline at end of file